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High Speed, Combi-Sense(R), Synchronous MOSFET Driver for Mobile Applications
POWER MANAGEMENT Description
The SC1211VX is a high speed, Combi-Sense(R), dual output driver designed to drive high-side and low-side MOSFETs in a synchronous Buck converter. These drivers combined with Combi-Sense(R) PWM controllers, such as Semtech SC2643VX or SC2643, provide a cost effective multi-phase voltage regulator for advanced microprocessors. The Combi-Sense(R) is a technique to sense the inductor current for peak current mode control of voltage regulator without using sensing resistor. It provides the following advantages: - No costly precision sensing resistor - Lossless current sensing - High level noise free signal - Fast response - Suitable for wide range of duty cycle - Only two small signal components (third optional) The detailed explanation of the technique can be found in the Applications Information section. A 30ns max propagation delay from input transition to the gate of the power FET's guarantees operation at high switching frequencies. Internal overlap protection circuit prevents shoot-through from Vin to PGND in the main and synchronous MOSFETs. The adaptive overlap protection circuit ensures the bottom FET does not turn on until the top FET source has reached 1V, to prevent crossconduction. High current drive capability allows fast switching, thus reducing switching losses at high (up to 1.5MHz) frequencies without causing thermal stress on the driver. Under-voltage-lockout and over-temperature shutdown features are included for proper and safe operation. Timed latches and improved robustness are built into the housekeeping functions such as the Under Voltage Lockout and adaptive Shoot-through protection circuitry to prevent false triggering and to assure safe operation. The SC1211VX is offered in a Power SOIC-8L package.
SC1211VX
Features
u High efficiency u High peak drive current u Adaptive non-overlapping gate drives provide u u u u u u u u u
shoot-through protection Support Combi-Sense(R) and VID-on-fly operations Fast rise and fall times (15ns typical with 3000pf load) Ultra-low (<30ns) propagation delay (BG going low) Floating top gate drive Crowbar function for over voltage protection High frequency (to 1.5 MHz) operation allows use of small inductors and low cost ceramic capacitors Under-voltage-lockout Low quiescent current Power SOIC-8L package, fully RoHS and WEEE compliant
Applications
u Intel Pentium(R) processor power supplies u AMD AthlonTM and AMD-K8TM processor power supplies u High efficiency portable and notebook computers u Battery powered applications u High current low voltage DC-DC converters
October 12, 2005
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SC1211VX
POWER MANAGEMENT Typical Application Circuit
Vin (+12V) D1
C1 1uF Q1
PWM
1N4148
4
3
2
1
BST
CO
TG
DRN
R1 9 1R0 1 L1 Vout 2
U1 VPN VIN
PGND VCC BG
SC1211V X
Q2 C4
5
6
7
Vcc (+5V)
8 C2 1uF R2 C3
Inductor Curr ent Signal
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SC1211VX
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter VCC Supply Voltage VIN to PGND BST to DRN BST to PGND BST to PGND Pulse DRN to PGND DRN to PGND Pulse VPN to PGND PWM Input Continuous Power Dissipation Thermal Resistance Junction to Case Operating Junction Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 Sec.
Symbol VCC VIN VBST-DRN VBST-PGND VBST_PULSE VDRN-PGND VDRN_PULSE VPN CO PD JC TJ TSTG TLEAD
Conditions
Maximum 10 30 10 36
Units V V V V V V V V V W C/W C C C
tPULSE < 100ns
41 -2 to 29
tPULSE < 100ns
-4 to 34 30 -0.3 to 5
TA = 25C, TJ =125C
2.56 8 0 to +125 -65 to +150 300
NOTE: (1) This device is ESD sensitive. Use of standard ESD handling precautions is required.
Electrical Characteristics
Unless specified: TA = 25C; VCC = 5V
Parameter Pow er Supply Supply Voltage Quiescent Current, Operating Under Voltage Lockout Start Threshold Hysteresis
Symbol
Conditions
Min
Typ
Max
Units
VCC Iq_op
4.3
5 3.0
6.0
V mA
VCC_START VhysUVLO
4 160
4.3
V mV
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SC1211VX
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: TA = 25C; VCC = 5V
Parameter CO High Level Input Voltage Low Level Input Voltage Thermal Shutdow n Over Temperature Trip Point Hysteresis High Side Driver (TG) Output Impedance Rise Time Fall Time Propagation Delay, TG Going High Propagation Delay, TG Going Low Low -Side Driver (BG) Output Resistance Rise Time Fall Time Propagation Delay, BG Going High Propagation Delay, BG Going Low Under-Voltage-Lockout Time Delay VCC ramping up VCC ramping down
Symbol
Conditions
Min
Typ
Max
Units
VCO_H VCO_L
2.0 0.8
V V
TOTP THYST
155 10
C C
RSRC_TG RSINK_TG tR_TG tF_TG tPDH_TG tPDL_TG
1.24 VBST - VDRN = 5V CL = 3.3nF, VBST - VDRN = 5V CL = 3.3nF, VBST - VDRN = 5V VBST - VDRN = 5V VBST - VDRN = 5V 0.86 8 8 20 25
1.8 1.3
Ohms ns ns ns ns
RSRC_BG RSINK_BG tR_BG tF_BG tPDH_BG tPDL_BG
VBST - VDRN = 5V CL = 3.3nF, VBST - VDRN = 5V CL = 3.3nF, VBST - VDRN = 5V VBST - VDRN = 5V VBST - VDRN = 5V
1.28 0.6 8 4 20 25
1.7 1.2
Ohms ns ns ns ns
tPDH_UVLO tPDL_UVLO
2 2
s s
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SC1211VX
POWER MANAGEMENT Timing Diagrams
CO
DRN
1.0V
TG tPDH_TG tR_TG tPDL_TG tF_TG
BG tPDL_BG tF_BG
1.4V
tPDH_BG
tR_BG
Rising Edge Transition
Falling Edge Transition
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SC1211VX
POWER MANAGEMENT Pin Configuration Ordering Information
D evice
(1)
P ackag e ED P SO-8 ED P SO-8
Temp R ange (TJ) 0 to 125C 0 to 125C
SC 1211VXSTR
DRN TG BST CO
1
PGND
8 7 6 5
BG VCC VIN VPN
SC 1211VXSTRT(2)
2 3 4
Note: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2). SC1211VXSTRT is lead free part.
EXPOSED PAD MUST BE SOLDERED TO POWER GROUND PLANE
Pin Descriptions
Pin # 1 2 3 4 5 6 7 8 PAD Pin Name DRN TG BST CO VPN VIN VC C BG PGND Pin Function The power phase node (or switching node) of the synchronous Buck converter. This pin can be subjected to a negtative spike up to -Vcc relative to PGND without affecting operation. Output gate drive for the switching (top) MOSFET. Bootstrap pin. A capacitor is connected between BST and DRN pins to develop the floating bootstrap voltage for the high-side MOSFET. The capacitor value is typically 1F (ceramic). Logic level PWM input signal to the SC1211VX supplied by external controller. An internal 50kohm resistor is connected from this pin to PGND. Virtual Phase Node. Connect an RC between this pin and the output sense point of the converter to enable Combi-Sense (R) operation. See the Typical Application Circuit. Sensing input for internal Combi-Sense (R) circuitry. Connect as close as possible to the Drain of the top MOSFET. Supply power for the SC1211VX. Connect to 5V supply for optimum operation. A 1.0uF-4.7uF Capacitor must be connected from this pin to PGND as close as possible. Output gate drive for the synchronous (bottom) MOSFET. Ground. Keep this pin close to the synchronous MOSFET source.
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SC1211VX
POWER MANAGEMENT Block Diagram
VCC VIN
UVLO
LOGIC
VPN
BST TG CONTROL & OVERLAP PROT ECTION CIRCUIT DRN
CO
PGND
BG
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SC1211VX
POWER MANAGEMENT Applications Information
THEORY OPERATION THEOR Y OF OPERATION The SC1211VX is a high speed, Combi-Sense(R), dual output driver designed to drive top and bottom MOSFETs in a synchronous Buck converter. It features adaptive delay for shoot-through protection and VID-on-Fly operation; 5V gate drive voltage; and Virtual Phase Node for Combi-Sense(R) solution. These drivers combined with PWM controller SC2643VX form a multi-phase voltage regulator for advanced microprocessors. A three-phase voltage regulator with 19V input 60A output is shown in the Typical Application Circuit section. Startup and UVLO To startup the driver, a supply voltage applied to VCC pin of the SC1211VX. The top and bottom gates are held low until VCC exceeds UVLO threshold of the driver, typically 4.2V. Then the top gate remains low and the bottom gate is pulled high to turn on the bottom FET. Once VIN exceeds UVLO threshold of the PWM controller, typically 7.5V, the soft-start begins and the PWM signal takes fully control of the gate transitions. Gate Transition Shoot through Pro Gat e Transition and Shoo t thr ough Pr o t ection Refer to the Timing Diagrams section, the rising edge of the PWM input initiates the bottom FET turn-off and the top FET turn-on. After a short propagation delay (tPDL_BG), the bottom gate begins to fall (tF_BG). An adaptive circuit in the SC1211VX monitors the bottom gate voltage to drop below 1.4V. Then after a preset delay time (tPDH_TG) is expired, the top gate turns on. The delay time is set to be 20ns typically. This prevents the top FET from turning on until the bottom FET is off. During the transition, the inductor current is freewheeling through the body diode of either bottom FET or top FET, upon the direction of the inductor current. The phase node could be low (ground) or high (VIN). The falling edge of the PWM input controls the top FET turn-off and the bottom FET turn-on. After a short propagation delay (tPDL_TG), the top gate begins to fall (tF_TG). As the inductor current is commutated from the top FET to the body diode of the bottom FET, the phase node begins to fall. The adaptive circuit in the SC1211VX detects the phase node voltage. It holds the bottom FET off until the phase node voltage has dropped below 1.0V. This prevents the top and bottom FETs from conducting simultaneously or shoot-through.
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VID-on-Fly Operation Certain new processors have required to changing the VID dynamically during the operation, or refered as VIDon-Fly operation. A VID-on-Fly can occur under light load or heavy load conditions. At light load, it could force the converter to sink current. Upon turn-off of the top FET, the reversed inductor current has to be freewheeling through the body diode of the top FET instead of the bottom FET. As a result, the phase node voltage remains high. The SC1211VX incorporates the ability by pulling the bottom gate to high internally, which over rides the adaptive circuit and turns the bottom FET on. The delay time from the PWM falling egde to the bottom gate turnon is set at 200ns typically. Combi-Sense(R) Virtual Phase Node for Combi-Sense Peak-Current-Mode control is widely employed in multiphase voltage regulators. It features phase current balance, fast transient response, and over current protection, etc. These are essential to low-voltage high-current regulators designed for advanced microprocessors. Usually, a costly current sensing resistor is required to obtain the output inductor current information for the peak current control. The Combi-Sense(R) technique featured by the SC1211VX is an approach to sense inductor current without using sensing resistor.
VIN VIN
Qcst VPN C DRN
Q1 Lo
Vout
Qcsb PGND
Q2
+
Co
Rcs
Ccs
SC1211VX
Inductor C urrent Signal
The above circuit shows the concept of Combi-Sense(R) technique. An internal totem pole (Qcst, Qcsb) generates a VPN (Virtual Phase Node) signal. This VPN follows the DRN (or the Power Phase Node) with the same timing. A RC network (Rcs and Ccs) is connected between
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SC1211VX
POWER MANAGEMENT Applications Information (Cont.)
VPN and Vout. During Q1 turn-on, Qcst turns on as well. The voltage drop across Q1 and Lo charges Ccs. During Q2 turn-on, Qcsb turns on as well. The voltage drop across Q2 and Lo discharges Ccs. Both voltage drops are proportional to the inductor current and a resistance equal to FET's Rdson plus ESR of the inductor. If the time constant Rcs x Ccs is close to the Lo/Ro of the inductor, where Ro is given by be in the range of: Switching Frequency 100kHz to 500kHz per phase Inductor Value 0.2uH to 2uH FETs 4m-ohm to 20m-ohm Rdson 20nC to 100nC total gate charge Bootstrap Circuit The SC1211VX uses an external bootstrap circuit to provide a voltage for the top FET drive. This voltage, referring to the Phase Node, is held up by a bootstrap capacitor. The capacitor value can be calculated based on the total gate charge of the top FET, QTOP, and an allowed voltage ripple on the capacitor, VBST, in one PWM cycle: CBST > QTOP/VBST Typically, it is recommended to use a 1uF ceramic capacitor with 25V rating and a commonly available diode IN4148 for the bootstrap circuit. In addition, a small resistor (one ohm) has to be added in between DRN of the SC1211VX and the Phase Node. The resistor is used to allievate the stress of the SC1211VX from exposing to the negative spike at the Phase node. A negative spike could occur at the Phase Node during the top FET turnoff due to parasitic inductance in the switching loop. The spike could be minimized with a careful PCB layout. In those applications with TO-220 package FETs, it is recommended to use a clamping diode on the DRN pin to mitigate the impact of the excessive phase node negative spike. Filters for Supply Power For VCC pin of the SC1211VX, it is recommended to use a 1uF to 4.7uF, 25V rating ceramic capacitor for decoupling. LAY LAY OUT GUIDELINES The switching regulator is a high di/dt power circuit. Its Printed Circuit Board (PCB) layout is critical. A good layout can achieve an optimum circuit performance while minimized the component stress, resulting in better system reliability. For a multi-phase voltage regulator, the SC1211VX driver, FETs, inductor, and supply decoupling capacitors in each phase have to be considered as a
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Ro = Rinductor + Rdson _ hs * D + Rdson _ ls * (1 - D)
the signal developed across Ccs will be proportional to the inductor current, where Ro is the equivalent current sensing resistance. In the above equation, Rinductor is ESR of the inductor, Rdson_hs and Rdson_ls are the top and bottom FET's Rdson, and D is the duty cycle of the converter. Since a perfect timing match down to the nanosecond is impossible, the VPN totem pole is held in tri-state during the communtations of DRN in the SC1211VX. This avoids errors and offset on the current detection which can be significant since the timing mismatch is multiplied by the input voltage. An optional capacitor between VPN and DRN allows these two nodes to be AC coupled during the tri-state window, hence yields a perfect timing match. Refer to Semtech SC2643VX Combi-Sense(R) Current Mode Controller about the details of the Combi-Sense(R) technique. Thermal Shut Down The SC1211VX will shut down by pulling both driver outputs low if its junction temperature, Tj, exceeds 155C. COMPONENT SELECTION Freq uency, Inductor requency MOSFETs Switching F req uency , Induct or and MOSFETs The SC1211VX is capable of providing up to 3.5A peak drive current, and operating up to 1.5MHz PWM frequency without causing thermal stress on the driver. The selection of switching frequency, together with inductor and FETs is a trade-off between the cost, size, and thermal management of a multi-phase voltage regulator. In modern microprocessor applications, these parameters could
2005 Semtech Corp.
SC1211VX
POWER MANAGEMENT Applications Information (Cont.)
whole during PCB layout. Refer to Semtech SC2643VX/ SC1211VX EVB Layout Guideline. For the SC1211VX driver, the following guidelines are typically recommended during PCB layout: 1. Place the SC1211VX close to the FETs for shortest gate drive traces and ground return paths. 2. Connect the bypass capacitor as close as possible to pin VCC and PGND for decoupling. 3. Locate the components of the bootstrap circuit close to the SC1211VX. CONSIDERATION SOLDERING CONSIDERATION The exposed die pad of the SC1211VX is used for ground return and thermal release of the driver. The pad must be soldered to the ground plane that is further connected to the system ground in the inner layer through multiple vias. For better electrical and thermal performance, it is recommended to use all copper available under the driver as the ground plane, and place the vias as close as possible to the solder pad. Meanwhile, the vias have to be masked out to prevent solder leakage during reflow. The layout arrangement is detailed in the above figure, which also can be found in the "Land Pattern - Power SOIC-8" section.
Solder Pad
Solder Mask Copper Vias
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SC1211VX
POWER MANAGEMENT Outline Drawing - Power SOIC-8 Outline Drawing - Power SOIC-8L
Land Pattern - Power SOIC-8
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Rd., Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
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